Voltage controlled oscillators (VCOs) are used in phase locked loops (PLLs) to generate digital or analog clock signals for microprocessors, wireless communications systems, etc.
One type of VCO commonly used is an LC-tank based VCO. LC-tank VCOs generate clock signals with a high quality factor (Q-factor, or simply ‘Q’), but have several undesirable design constraints and are relatively expensive to implement in integrated circuits (ICs). Furthermore, LC-tank VCOs have a relatively narrow frequency tuning-range, which leads to a low process variation tolerance during manufacturing and negatively impacts product yield.
Another type of VCO commonly used is a ring based oscillator. A ring oscillator is a device composed of an odd number of inverting delay cells (e.g., inverters, NAND gates, etc.) whose output signal oscillates between two voltage levels. The delay cells are coupled to each other in series where the output of the last delay cell is fed back into the input of the first delay cell to form a chain.
FIG. 1 illustrates an example of a conventional ring oscillator. As shown, a conventional ring oscillator 100 can be formed of a plurality of inverters coupled together in series. Because a single inverter computes the logical NOT of its input, the last output of an odd numbered chain of inverters is the logical NOT of the first input. This final output is asserted a finite amount of time after the first input is asserted, and thus, the feedback of this last output to the first input causes oscillation.
Ring oscillators are capable of generating a wider frequency tuning-range than are LC-tank VCOs, which can help overcome process variations experienced during manufacturing, and therefore improve product yield. However, conventional ring oscillators suffer from relatively poor signal quality (as measured by, e.g., phase noise or jitter) due to a lower Q-factor as compared to LC-tank VCOs. This can be a significant drawback of ring oscillators for certain applications.